1. Field of the Invention
The present invention relates to a method of fabricating an integrated circuit. More particularly, the present invention relates to a method of fabricating semiconductor device.
2. Description of Related Art
With demands on light weight, thin, short and small size for marketing, the critical dimensions (CD) of semiconductor process is continuously developed toward smaller dimension. However, it is particularly important in controlling the resistance of each material layer, the profiles of patterns and the defects.
For example, in the case of metal-insulator-metal capacitors, since the stress migration (SM) efficiency of metal electrode is insufficient, the distribution of resistance shift is too board to adversely affect the charge storage characteristic of a capacitor. While a gap between two capacitors is decreased, and if etching residues remain between the capacitors, a bridging problem of the capacitors may be raised. In addition, a problem of short circuit may be generated if the control of electrode profiles of the capacitor is improper.